• DocumentCode
    1401591
  • Title

    Photonic Device Layout Within the Foundry CMOS Design Environment

  • Author

    Orcutt, Jason S. ; Ram, Rajeev J.

  • Author_Institution
    Res. Lab. of Electron., Massachusetts Inst. of Technol., Cambridge, MA, USA
  • Volume
    22
  • Issue
    8
  • fYear
    2010
  • fDate
    4/15/2010 12:00:00 AM
  • Firstpage
    544
  • Lastpage
    546
  • Abstract
    A design methodology to layout photonic devices within standard electronic complementary metal-oxide-semiconductor (CMOS) foundry data preparation flows is described. This platform has enabled the fabrication of designs in three foundry scaled-CMOS processes from two semiconductor manufacturers.
  • Keywords
    CMOS integrated circuits; integrated optics; optical design techniques; optical fabrication; optical waveguides; design fabrication; electronic complementary metal-oxide-semiconductor; foundry CMOS design; optical waveguides; photonic device integration; photonic device layout; Complementary metal–oxide–semiconductor (CMOS) integrated circuits; design automation; optical device fabrication; optical planar waveguide components;
  • fLanguage
    English
  • Journal_Title
    Photonics Technology Letters, IEEE
  • Publisher
    ieee
  • ISSN
    1041-1135
  • Type

    jour

  • DOI
    10.1109/LPT.2010.2041445
  • Filename
    5404750
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1401591