Title :
Photonic Device Layout Within the Foundry CMOS Design Environment
Author :
Orcutt, Jason S. ; Ram, Rajeev J.
Author_Institution :
Res. Lab. of Electron., Massachusetts Inst. of Technol., Cambridge, MA, USA
fDate :
4/15/2010 12:00:00 AM
Abstract :
A design methodology to layout photonic devices within standard electronic complementary metal-oxide-semiconductor (CMOS) foundry data preparation flows is described. This platform has enabled the fabrication of designs in three foundry scaled-CMOS processes from two semiconductor manufacturers.
Keywords :
CMOS integrated circuits; integrated optics; optical design techniques; optical fabrication; optical waveguides; design fabrication; electronic complementary metal-oxide-semiconductor; foundry CMOS design; optical waveguides; photonic device integration; photonic device layout; Complementary metal–oxide–semiconductor (CMOS) integrated circuits; design automation; optical device fabrication; optical planar waveguide components;
Journal_Title :
Photonics Technology Letters, IEEE
DOI :
10.1109/LPT.2010.2041445
