DocumentCode :
1401896
Title :
A Low-Dropout Regulator With Tail Current Control for DPWM Clock Correction
Author :
Wang, Jia-Hui ; Tsai, Chien-Hung ; Lai, Sheng-Wen
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
Volume :
59
Issue :
1
fYear :
2012
Firstpage :
45
Lastpage :
49
Abstract :
A low-dropout (LDO) regulator with tail current control (TCC) is presented. The TCC consists of a dual differential pair, a 5-bit current digital-to-analog converter, and a current summation circuit. The TCC adjusts the tail current ratio of the dual differential pair of the LDO regulator to achieve a programmable output voltage using 5-bit digital signals. A supply-ripple isolation mechanism is added to improve the power supply rejection over a wide frequency range. The proposed design is fabricated in the TSMC 0.18-μm 1-poly 6-metal complementary metal-oxide-semiconductor process. Experimental results show that the LDO regulator has a 32-level programmable output voltage ranging from 1 to 1.2 V, making the LDO regulator suitable for correcting the oscillator frequency of a digital pulsewidth modulator.
Keywords :
clocks; digital-analogue conversion; modulators; DPWM clock correction; TSMC; current summation circuit; digital pulsewidth modulator; digital to analog converter; dual differential pair; low dropout regulator; oscillator frequency; programmable output voltage; supply ripple isolation mechanism; tail current control; voltage 1 V to 1.2 V; CMOS integrated circuits; Capacitors; Clocks; Regulators; System-on-a-chip; Transistors; Voltage control; Current digital-to-analog converter (DAC); digital pulsewidth modulation (DPWM); dynamic voltage scalability; low-dropout (LDO) regulator; power supply rejection (PSR); tail current control (TCC);
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2011.2177703
Filename :
6107568
Link To Document :
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