When are transmission-line effects important for on-chip interconnections?

Author

Deutsch, Alina ; Kopcsay, Gerard V. ; Restle, Phillip J. ; Smith, Howard H. ; Katopis, G. ; Becker, Wiren D. ; Coteus, Paul W. ; Surovic, Christopher W. ; Rubin, Barry J. ; Dunne, Richard P., Jr. ; Gallo, T. ; Jenkins, Keith A. ; Terman, Lewis M. ; Dennar

Author_Institution

IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

Volume

45

Issue

10

fYear

1997

fDate

10/1/1997 12:00:00 AM

Firstpage

1836

Lastpage

1846

Abstract

Short, medium, and long on-chip interconnections having linewidths of 0.45-52 μm are analyzed in a five-metal-layer structure. We study capacitive coupling for short lines, inductive coupling for medium-length lines, inductance and resistance of the current return path in the power buses, and line resistive losses for the global wiring. Design guidelines and technology changes are proposed to achieve minimum delay and contain crosstalk for local and global wiring. Conditional expressions are given to determine when transmission-line effects are important for accurate delay and crosstalk prediction

Keywords

crosstalk; delays; integrated circuit interconnections; transmission line theory; 0.45 to 0.52 micron; capacitive coupling; crosstalk; delay; design; global wiring; inductive coupling; local wiring; metal multilayer; on-chip interconnection; power bus; resistive loss; transmission line effect; Capacitance; Couplings; Crosstalk; Delay; Guidelines; Inductance; Integrated circuit interconnections; Space technology; Transmission lines; Wiring;

fLanguage

English

Journal_Title

Microwave Theory and Techniques, IEEE Transactions on

Publisher

ieee

ISSN

0018-9480

Type

jour

DOI

10.1109/22.641781

Filename

641781