• DocumentCode
    1405325
  • Title

    Top-down logic design with pass-transistor cells and efficient synthesiser

  • Author

    Hsiao, Shen-Fu ; Yeh, Jia-Siang

  • Author_Institution
    Inst. of Comput. & Inf. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
  • Volume
    34
  • Issue
    12
  • fYear
    1998
  • fDate
    6/11/1998 12:00:00 AM
  • Firstpage
    1180
  • Lastpage
    1182
  • Abstract
    A pass-transistor based cell library containing only two types of cells is designed and a corresponding logic/circuit synthesiser developed for logic mapping of any combinational circuit. The proposed design has better performance than the recently proposed lean integration with pass transistors (LEAP) cell library. Furthermore, the modified LEAP cell library can be easily migrated to a new process technology due to the smaller number of cells
  • Keywords
    combinational circuits; logic design; LEAP cell library; circuit synthesiser; combinational circuit; logic mapping; logic synthesiser; pass-transistor cells; process technology; top-down logic design;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19980880
  • Filename
    702357