DocumentCode :
1405621
Title :
Computation-effective 3-D graphics rendering architecture for embedded multimedia system
Author :
Liang, Bor-Sung ; Jen, Chein-Wei
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume :
46
Issue :
3
fYear :
2000
fDate :
8/1/2000 12:00:00 AM
Firstpage :
735
Lastpage :
743
Abstract :
A new architecture is proposed to realize 3-D graphics rendering for an embedded multimedia system. Because only 20% to 83% triangles in the original 3-D object models are visible by simulation, our architecture is designed to eliminate the redundant operations on invisible triangles without image quality loss. It is based on our index rendering and enhanced deferred lighting approach, and it features a dual pipeline rendering architecture. The simulation and analysis results show that this architecture can save up to 63.4% CPU operations compared with traditional architectures
Keywords :
embedded systems; multimedia systems; pipeline processing; rendering (computer graphics); 3D graphics rendering architecture; 3D object models; CPU operations saving; computation-effective architecture; dual pipeline rendering architecture; enhanced deferred lighting; index rendering; redundant operations elimination; simulation; simulation results; Analytical models; Computer architecture; Embedded computing; Embedded system; Geometry; Graphics; Image quality; Multimedia systems; Pipelines; Rendering (computer graphics);
fLanguage :
English
Journal_Title :
Consumer Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-3063
Type :
jour
DOI :
10.1109/30.883440
Filename :
883440
Link To Document :
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