DocumentCode
1405758
Title
Don´t cares in synthesis: theoretical pitfalls and practical solutions
Author
Brand, Daniel ; Bergamaschi, Reinaldo A. ; Stok, Leon
Author_Institution
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Volume
17
Issue
4
fYear
1998
fDate
4/1/1998 12:00:00 AM
Firstpage
285
Lastpage
304
Abstract
The effective use of don´t cares requires solving several theoretical and practical problems. The theoretical problems are caused by a need to have all tools in a methodology use a consistent semantics of don´t cares, so as to guarantee correctness of the final implementation. Several common meanings of “don´t care” will be considered, and their respective conditions for design correctness will be derived. The main theoretical result shows that in existing design languages, the following three desirable properties are mutually inconsistent: unrestricted use of non-Boolean values (e.g., X), implementing a large design one partition at a time, and assurance of correctness of the final implementation. A practical solution to this problem involves several issues: specifying don´t cares in a language description, deriving them during high-level synthesis, and optimizing logic in their presence. Experimental results showing the impact of don´t cares on logic quality are presented
Keywords
high level synthesis; logic design; digital design language; don´t cares; high-level synthesis; logic optimization; nonBoolean value; partitioning; semantics; synthesis; Decoding; Hardware design languages; High level synthesis; Law; Legal factors; Logic design; Logic gates; Programmable logic arrays; Signal synthesis; Testing;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.703819
Filename
703819
Link To Document