Title :
Theory and algorithms for face hypercube embedding
Author :
Goldberg, Evguenii I. ; Villa, Tiziano ; Brayton, Robert K. ; Sangiovanni-Vincentelli, Alberto L.
Author_Institution :
Cadence Berkeley Labs., Berkeley, CA, USA
fDate :
6/1/1998 12:00:00 AM
Abstract :
We present a new matrix formulation of the face hypercube embedding problem that motivates the design of an efficient search strategy to find an encoding that satisfies all faces of minimum length. Increasing dimensions of the Boolean space are explored; for a given dimension constraints are satisfied one at a time. The following features help to reduce the nodes of the solution space that must be explored: candidate cubes instead of candidate codes are generated, cubes yielding symmetric solutions are not generated, a smaller sufficient set of solutions (producing basic sections) is explored, necessary conditions help discard unsuitable candidate cubes, early detection that a partial solution cannot be extended to be a global solution prunes infeasible portions of the search tree. We have implemented a prototype package minimum input satisfaction kernel (MINSK) based on the previous ideas and run experiments to evaluate it. The experiments show that MINSK is faster and solves more problems than any available algorithm. Moreover, MINSK is a robust algorithm, while most of the proposed alternatives are not. Besides most problems of the complete Microelectronics Center of North Carolina (MCNC) benchmark suite, other solved examples include an important set of decoder programmable logic arrays (PLA´s) coming from the design of microprocessor instruction sets
Keywords :
Boolean algebra; constraint theory; hypercube networks; logic design; matrix algebra; Boolean symmetry; MINSK algorithm; basic section; decoder programmable logic array; design; face hypercube embedding; input constraint; logic encoding; matrix; microprocessor instruction set; minimum input satisfaction kernel; search tree; Decoding; Encoding; Hypercubes; Kernel; Microelectronics; Packaging; Programmable logic arrays; Prototypes; Robustness; Space exploration;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on