Title :
Rebel: a clustering algorithm for look-up table FPGA´s
Author_Institution :
ACT Networks Inc., Manassas, VA, USA
fDate :
5/1/1998 12:00:00 AM
Abstract :
Rebel is a new algorithm for clustering gates into k-input function blocks for look-up table field-programmable gate arrays (FPGA´s). The algorithm propagates functional dependencies forward through a logic network, combining gates into clusters according to a heuristic metric. Rebel does a good job of handling reconvergent circuits, duplicating logic when it makes sense to do so, in addition, Rebel is fast, computing good clusters in near-linear time
Keywords :
directed graphs; field programmable gate arrays; logic CAD; network topology; table lookup; Rebel; clustering algorithm; functional dependencies; heuristic metric; k-input function blocks; logic network; look-up table FPGA; near-linear time; reconvergent circuits; Clustering algorithms; Clustering methods; Field programmable gate arrays; Logic circuits; Logic design; Logic gates; Network synthesis; Partitioning algorithms; Programmable logic arrays; Table lookup;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
