Design and Demonstration of a 5-Bit Flash-Type SFQ A/D Converter Integrated With Error Correction and Interleaving Circuits

We have designed a fully integrated 5-bit flash-type single-flux quantum (SFQ) analog-to-digital converter (ADC), in which an error correction and a bit-interleaving circuit are integrated with complementary quasi-one-junction SQUID (CQOS) comparators, and we verified its operation in experiments. Two types of look-back error correction circuits with different clock schemes were designed for the integrated ADCs to avoid the gray zone in comparators and to convert gray code to binary code. The interleaving circuit was also used in the ADC to add one extra bit. A binary 5-bit A/D converter was integrated into an IC chip. Then, input waveforms at low frequencies were successfully retrieved from the binary data of the A/D converter without any errors. We also confirmed that the A/D converter operated properly by conducting tests in our cryocooling system using a 4K-GM cryocooler after the chip was flip-chip bonded onto a multi-chip-module (MCM) carrier. We also used the beat frequency method to test and confirm that the CQOS comparator operated effectively at high frequency, i.e., 3 bits at 15 GHz in the binary code operation and 4 bits at 15 GHz in the gray code operation. Furthermore, operations at sampling frequencies of up to 32 and 50 GHz with a low-frequency analog input signal were experimentally confirmed for a 4-bit comparator circuit with a critical current density J_c of 2.5 kA/cm² and 10 kA/cm² , respectively.