Title :
A 0.5/0.8-V 9-GHz Frequency Synthesizer With Doubling Generation in 0.13-
CMOS
Author :
Yang, Ching-Yuan ; Chang, Chih-Hsiang ; Weng, Jun-Hong ; Wu, Hsin-Ming
Author_Institution :
Dept. of Electr. Eng., Nat. Chung Hsing Univ., Taichung, Taiwan
Abstract :
To lower the supply voltage for high-frequency operation, a fully integrated frequency synthesizer, together with regenerative frequency-doubling and fractional phase-rotating techniques, is presented. The frequency-doubling circuit regenerates the tail signals at twice the frequency of the quadrature voltage-controlled oscillator (QVCO) to achieve larger output swing and higher operating frequency for the synthesizer. Additionally, a hybrid circuit utilizing a new folded regime for the first-stage divider and the phase-rotating circuit is developed in the prescaler. Under full-speed operation, the QVCO with the frequency doubler and the divider can work from a 0.5-V supply, whereas the synthesizer dissipates 12 mW. At 9.1-GHz carrier frequency, the measured phase noise is -104.5 dBc/Hz from 1-MHz offset.
Keywords :
CMOS integrated circuits; MMIC oscillators; field effect MMIC; frequency dividers; frequency multipliers; frequency synthesizers; low-power electronics; voltage-controlled oscillators; CMOS integrated circuit; QVCO; first-stage divider; fractional phase-rotating circuit; frequency 9 GHz; frequency synthesizer; low voltage supply; quadrature voltage-controlled oscillator; regenerative frequency-doubling circuit; size 0.13 mum; voltage 0.5 V; voltage 0.8 V; Frequency doubler; frequency synthesizer; low voltage; phase rotator; phase-locked loop (PLL); voltage-controlled oscillator (VCO);
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2010.2092830