DocumentCode :
1409030
Title :
Test Structure for High Voltage LD-MOSFET Device Mismatch Investigations
Author :
Posch, Werner ; Murhammer, Christian ; Seebacher, Ehrenfried
Author_Institution :
Dept. of Process & Device Characterization, Austriamicrosystems AG, Unterpremstaetten, Austria
Volume :
25
Issue :
2
fYear :
2012
fDate :
5/1/2012 12:00:00 AM
Firstpage :
136
Lastpage :
144
Abstract :
A characterization setup for high voltage (HV) LD-MOSFET mismatch and variability determination is presented. Devices are aligned in rows and columns for gate and drain bias multiplexing and special HV-switches for voltages up to 50 V are controlled by externally generated digital signals. Automatic DC measurements can be performed on up to 4992 HV-NMOSFETs. The circuit designs of the HV-switches are described in detail and characterization data gained during functionality evaluation are presented. Variability data are provided for both short and long distance matching characterization.
Keywords :
MOSFET; semiconductor device testing; HV LD-MOSFET mismatch; HV-switches; automatic DC measurement; circuit design; digital signal; drain bias multiplexing; functionality evaluation; gate; high voltage LD-MOSFET device mismatch; long distance matching characterization; short distance matching characterization; test structure; variability determination; Doping; Electric potential; Logic gates; Multiplexing; Substrates; Switches; Transistors; Device mismatch; HV-MOSFET; LDMOS; distance matching; high voltage (HV); matching; terminal multiplexing;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/TSM.2011.2181657
Filename :
6112690
Link To Document :
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