Title :
Equivalent circular defect model of real defect outlines in the IC manufacturing process
Author :
Jiang, Xiaohong ; Hao, Yue ; Xu, Guohua
Author_Institution :
Inst. of Microelectron., Xidian Univ., Xi´´an, China
fDate :
8/1/1998 12:00:00 AM
Abstract :
For efficient yield prediction and inductive fault analysis of integrated circuits (IC´s), it is usually assumed that defects related to photolithography have the shape of circular discs or squares. Real defects, however, exhibit a great variety of shapes. This paper presents an accurate model to characterize those real defects. The defect outline is used in this model to determine an equivalent circular defect such that the probability that the circular defect causes a fault is the same as the probability that the real defect causes a fault, so a norm is available which ran be used to determine the accuracy of a defect model, and thus estimate approximately the error that will be aroused in the prediction of fault probability of a pattern by using circular defect model. Finally, the new model is illustrated with the real defect outlines obtained by optical inspection
Keywords :
integrated circuit yield; photolithography; semiconductor process modelling; IC manufacturing; defect shape; equivalent circular defect model; fault probability; inductive fault analysis; optical inspection; photolithography; real defect outline; yield; Circuit analysis; Circuit faults; Conductors; Inspection; Integrated circuit modeling; Integrated circuit yield; Manufacturing processes; Pattern analysis; Predictive models; Shape;
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on