Title :
Nonvolatile Poly-Si TFT Charge-Trap Flash Memory With Engineered Tunnel Barrier
Author :
You, Hee-Wook ; Cho, Won-Ju
Author_Institution :
Dept. of Electron. Mater. Eng., Kwangwoon Univ., Seoul, South Korea
Abstract :
Tunnel-barrier-engineered thin-film transistor (TFT) memory (TBE-TFT memory) devices on glass substrates were fabricated using low-temperature processes. An amorphous silicon film on the glass substrate was crystallized using excimer laser annealing for system-on-panel applications. The engineered tunnel barrier of VARIOT type (SiO2/Si3N4/SiO2) with a high-k HfO2 charge-trapping layer and an Al2O3 blocking layer was applied to TBE-TFT memory devices in order to enhance the memory performance of TBE-TFT memory devices. As a result, the poly-Si TFT charge-trap Flash memory with an engineered tunnel barrier exhibited excellent memory characteristics, such as large memory window (9.5 V), long retention time, and endurance.
Keywords :
alumina; amorphous semiconductors; crystallisation; elemental semiconductors; excimer lasers; flash memories; hafnium compounds; high-k dielectric thin films; laser beam annealing; random-access storage; silicon; silicon compounds; thin film transistors; tunnelling; Al2O3 blocking layer; Si-HfO2-Al2O3; SiO2-Si3N4-SiO2; TBE-TFT memory device; VARIOT; amorphous silicon film; engineered tunnel barrier; excimer laser annealing; glass substrate; high-k HfO2 charge-trapping layer; low-temperature process; memory characteristics; memory window; nonvolatile polySi TFT charge-trap flash memory; retention time; system-on-panel application; tunnel-barrier-engineered thin-film transistor memory device; Charge carrier processes; Glass; Hafnium compounds; Logic gates; Silicon; Substrates; Thin film transistors; High-$k$; TFT; VARIOT type; poly-Si thin-film transistor (TFT); system on panel (SOP); tunnel barrier engineered;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2011.2177060
