• DocumentCode
    1409838
  • Title

    FinFET-a self-aligned double-gate MOSFET scalable to 20 nm

  • Author

    Hisamoto, Digh ; Lee, Wen-Chin ; Kedzierski, Jakub ; Takeuchi, Hideki ; Asano, Kazuya ; Kuo, Charles ; Anderson, Erik ; King, Tsu-Jae ; Bokor, Jeffrey ; Hu, Chenming

  • Author_Institution
    Central Res. Lab., Hitachi Ltd., Tokyo, Japan
  • Volume
    47
  • Issue
    12
  • fYear
    2000
  • fDate
    12/1/2000 12:00:00 AM
  • Firstpage
    2320
  • Lastpage
    2325
  • Abstract
    MOSFETs with gate length down to 17 nm are reported. To suppress the short channel effect, a novel self-aligned double-gate MOSFET, FinFET, is proposed. By using boron-doped Si0.4Ge0.6 as a gate material, the desired threshold voltage was achieved for the ultrathin body device. The quasiplanar nature of this new variant of the vertical double-gate MOSFETs can be fabricated relatively easily using the conventional planar MOSFET process technologies.
  • Keywords
    Ge-Si alloys; MOSFET; boron; 20 nm; FinFET; Si0.4Ge0.6:B; quasiplanar nature; self-aligned double-gate MOSFET; threshold voltage; ultrathin body device; vertical double-gate MOSFETs; Degradation; Fabrication; FinFETs; Germanium silicon alloys; Immune system; Laboratories; MOSFET circuits; Semiconductor films; Silicon germanium; Threshold voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.887014
  • Filename
    887014