DocumentCode :
1411112
Title :
Modeling circuit parasitics. 3
Author :
Wadell, Brian C.
Volume :
1
Issue :
3
fYear :
1998
fDate :
9/1/1998 12:00:00 AM
Firstpage :
28
Abstract :
In the first two apnotes we introduced zero-length models for circuit parasitics (i.e., lumped elements) and showed how you can estimate resistive and inductive parasitics. In this installment we will look at capacitive parasitics
Keywords :
capacitance; lumped parameter networks; capacitive parasitics; circuit parasitics; lumped elements; zero-length models; Capacitors; Coupling circuits; Dielectrics; Filters; Frequency; Impedance; Parasitic capacitance; Permittivity; RLC circuits; Voltage;
fLanguage :
English
Journal_Title :
Instrumentation & Measurement Magazine, IEEE
Publisher :
ieee
ISSN :
1094-6969
Type :
jour
DOI :
10.1109/5289.706022
Filename :
706022
Link To Document :
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