Title :
HFinFET: A Scalable, High Performance, Low Leakage Hybrid n-Channel FET
Author :
Majumdar, Kausik ; Majhi, Prashant ; Bhat, Navakanta ; Jammy, Raj
Author_Institution :
Dept. of Electr. Commun. Eng., Indian Inst. of Sci., Bangalore, India
fDate :
5/1/2010 12:00:00 AM
Abstract :
In this letter, we propose the design and simulation study of a novel transistor, called HFinFET, which is a hybrid of an HEMT and a FinFET, to obtain excellent performance and good off-state control. Followed by the description of the design, 3-D device simulation has been performed to predict the characteristics of the device. The device has been benchmarked against published state of the art HEMT as well as planar and nonplanar Si n-MOSFET data of comparable gate length using standard benchmarking techniques.
Keywords :
MOSFET; electrical faults; high electron mobility transistors; silicon; 3D device simulation; HEMT; HFinFET; Si; low leakage hybrid n-channel FET; n-MOSFET data; transistors; Coupled Poisson–Schrodinger equations; FinFET; HEMT; transistor scaling;
Journal_Title :
Nanotechnology, IEEE Transactions on
DOI :
10.1109/TNANO.2010.2042459
