• DocumentCode
    1413754
  • Title

    High-performance short-channel MESFETs with WSiN gate suppressing As-outdiffusion (SAINT-GEN.II)

  • Author

    Tokumitsu, M. ; Onodera, K. ; Asai, Kikuo

  • Author_Institution
    LSI Lab., NTT, Kanagawa
  • Volume
    35
  • Issue
    12
  • fYear
    1988
  • fDate
    12/1/1988 12:00:00 AM
  • Firstpage
    2449
  • Abstract
    The formation of a highly conductive channel, which is one of the most effective methods to achieve high-performance GaAs MESFETs, requires that As-outdiffusion during high-temperature annealing be suppressed, because As vacancy creates more implanted Si acceptors, decreasing channel conductance. A refractory metal, WSiN, that effectively suppressing As-outdiffusion has been applied in an n+ -self-aligned ion-implantation MESFET technology (SAINT-GEN.II), and the performance of the fabricated FETs experimentally evaluated. The device structure studied had a 10-keV implanted shallow channel with a buried p-layer and an Au-coated WSiN gate. A 630 mS/mm maximum transconductance at gate voltage of 0.6 V and 510 mS/V-mm K-value at threshold voltage of -0.14 V were obtained. A 920 mS/mm intrinsic transconductance was estimated from source resistance of 0.51 Ω-mm. The gate resistance was as small as 3 μΩ-cm. A cutoff frequency as high as 96 GHz was obtained by extrapolating the current gain of 0.5 to 25.5 GHz at the correct 6 dB/octave. The effective saturation velocity is estimated at 1.8×107 cm/s. This represents an 80% improvement of velocity overshoot compared to long-gate MESFETs. The characteristics of a 23-stage ring oscillator using direct-coupled FET logic (DCFL) circuits with a propagation delay time of 6.7 ps/gate have also been investigated
  • Keywords
    III-V semiconductors; Schottky gate field effect transistors; field effect integrated circuits; gallium arsenide; ion implantation; solid-state microwave devices; -0.14 V; 0.6 V; 6.7 ps; 630 mS; 920 mS; 96 GHz; As outdiffusion suppression; Au-WSiN gate; DCFL; EHF; GaAs; III-V semiconductors; MESFETs; SAINT-GEN.II; SHF; buried p-layer; cutoff frequency; direct-coupled FET logic; gate voltage; high-temperature annealing; highly conductive channel; implanted shallow channel; intrinsic transconductance; maximum transconductance; n+-self-aligned ion implantation technology; propagation delay time; refractory metal gate; ring oscillator; short channel device; threshold voltage; Annealing; Cutoff frequency; FETs; Gallium arsenide; Logic circuits; MESFETs; Propagation delay; Ring oscillators; Threshold voltage; Transconductance;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.8880
  • Filename
    8880