DocumentCode :
1414960
Title :
Superspeculative microarchitecture for beyond AD 2000
Author :
Lipasti, Mikko H. ; Shen, J.P.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburg, PA, USA
Volume :
30
Issue :
9
fYear :
1997
fDate :
9/1/1997 12:00:00 AM
Firstpage :
59
Lastpage :
66
Abstract :
Based on their research at Carnegie Mellon University, the authors argue for billion-transistor uniprocessors. They divide the important implementation problems into three components: instruction flow, register dataflow, and memory dataflow. They also argue for trace caches and advanced branch prediction. Their article, however, focuses on using massive speculation at all levels to improve performance. They claim that without this much speculation, future processors will be limited by true data dependences, and will be unable to harvest enough instruction-level parallelism (ILP) to improve performance satisfactorily. Their investigations discovered large speedups on code that have traditionally not been amenable to finding ILP
Keywords :
computer architecture; data flow computing; reconfigurable architectures; billion-transistor uniprocessors; instruction flow; instruction-level parallelism; memory dataflow; microarchitecture; performance; register dataflow; Application software; Clocks; Engines; Frequency; Hardware; Microarchitecture; Microprocessors; Parallel processing; Technological innovation; VLIW;
fLanguage :
English
Journal_Title :
Computer
Publisher :
ieee
ISSN :
0018-9162
Type :
jour
DOI :
10.1109/2.612250
Filename :
612250
Link To Document :
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