DocumentCode :
1415241
Title :
Baring it all to software: Raw machines
Author :
Waingold, Elliot ; Taylor, Michael ; Srikrishna, Devabhaktuni ; Sarkar, Vivek ; Lee, Walter ; Lee, Victor ; Kim, Jang ; Frank, Matthew ; Finch, Peter ; Barua, Rajeev ; Babb, Jonathan ; Amarasinghe, Saman ; Agarwal, Anant
Author_Institution :
MIT, Cambridge, MA, USA
Volume :
30
Issue :
9
fYear :
1997
fDate :
9/1/1997 12:00:00 AM
Firstpage :
86
Lastpage :
93
Abstract :
The most radical of the architectures that appear in this issue are Raw processors-highly parallel architectures with hundreds of very simple processors coupled to a small portion of the on-chip memory. Each processor, or tile, also contains a small bank of configurable logic, allowing synthesis of complex operations directly in configurable hardware. Unlike the others, this architecture does not use a traditional instruction set architecture. Instead, programs are compiled directly onto the Raw hardware, with all units told explicitly what to do by the compiler. The compiler even schedules most of the intertile communication. The real limitation to this architecture is the efficacy of the compiler. The authors demonstrate impressive speedups for simple algorithms that lend themselves well to this architectural model, but whether this architecture will be effective for future workloads is an open question
Keywords :
parallel architectures; reconfigurable architectures; Raw processors; compiler; configurable logic; intertile communication; parallel architectures; Application software; Computer architecture; Computer science; Hardware; Laboratories; Logic; Microprocessors; Registers; Switches; Tiles;
fLanguage :
English
Journal_Title :
Computer
Publisher :
ieee
ISSN :
0018-9162
Type :
jour
DOI :
10.1109/2.612254
Filename :
612254
Link To Document :
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