DocumentCode :
1415556
Title :
The 82460GX server/workstation chip set
Author :
Dahlen, Eric ; Gustin, Jennifer ; Meredith, Susan ; Moran, Doug
Author_Institution :
Intel Corp., Folsom, CA, USA
Volume :
20
Issue :
6
fYear :
2000
Firstpage :
69
Lastpage :
75
Abstract :
Designing a chip set for a new processor architecture like the IA-64 requires handling multiple aspects. They include implementing the processor interface; providing sufficient I/O bandwidth for servers; supporting accelerated graphics port (AGP) graphics; and providing sufficient memory bandwidth for the processor, I/O, and graphics. This article provides an introduction to the memory, I/O, and graphics subsystems of Intel´s Itanium processor chip set and discusses several aspects of the processor bus
Keywords :
computer architecture; microprocessor chips; 82460GX server/workstation chip set; I/O bandwidth; IA-64; Intel´s Itanium processor chip; accelerated graphics port; memory bandwidth; processor architecture; processor interface; Bridges; Communication system control; Computer buffers; Control systems; Graphics; Microprogramming; Pins; Random access memory; Read-write memory; Workstations;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.888705
Filename :
888705
Link To Document :
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