DocumentCode
1416727
Title
Device physics and optimization of conductivity-modulated power MOSFETs
Author
Liu, D.K.Y. ; Plummer, James D.
Author_Institution
Center for Integrated Syst., Stanford Univ., CA
Volume
35
Issue
12
fYear
1988
fDate
12/1/1988 12:00:00 AM
Firstpage
2457
Lastpage
2458
Abstract
The operation of a novel power MOSFET device that has the capability of controlled conductivity modulation during its on-state operation to reduce its on-resistance is briefly described. CMDMOS (conductivity-modulated double-diffused MOS) devices have been fabricated and characterized along with DMOS devices with various geometries on wafers with various epitaxial layer thicknesses. The on-resistance of the CMDMOS devices was significantly reduced with the introduction of modest (250-μA) injector currents, which represent a very small fraction of the total current. The current-handling capability of the device increased by about 50%, giving a change in drain current about 10 times the injector current at 2.0-V drain bias. In general, the specific on-resistance of the CMDMOS devices was about half of that of comparable DMOS devices. The geometry and structure of the CMDMOS device were optimized by developing a simple analytical model for the on-resistance. In the analysis, the injector hole concentration and the extent of conductivity modulation in the drift region can be obtained as functions of the injector current, the drain current, and the spacing between the injector and the DMOS channel. The on-resistance is then derived by summing the voltage drops across the MOS channel region, the modulated region, and the drift region. This analysis leads to optimizing the depth of the injector, the separation of the injector from the DMOS channel, and the amount of injector current. The result is a power device that provides substantial flexibility in trading off on-resistance and switching speed
Keywords
insulated gate field effect transistors; power transistors; 2 V; 250 muA; CMDMOS; MOS channel region; analytical model; conductivity modulated DMOS; conductivity modulation; controlled conductivity modulation; current-handling capability; device optimisation; device physics; drain bias; drain current; drift region; epitaxial layer thicknesses; geometries; injector current; injector currents; injector hole concentration; modulated region; on-resistance; on-resistance/speed tradeoff; operation; power MOSFET device; power device; structure; voltage drops; Charge carrier processes; Conductivity; Electrons; Geometry; Insulated gate bipolar transistors; Insulation; MOSFETs; Physics; Solid state circuits; Voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.8899
Filename
8899
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