Title :
Numerical and experimental comparison of vertical DMOSFET and UMOSFET
Author :
Temple, V.A.K. ; Baliga, B. Jayant
fDate :
12/1/1988 12:00:00 AM
Abstract :
A numerical analysis has been performed to evaluate the relative performance of DMOS and UMOS power FETs based on a two-dimensional analytical approach. Since termination technology can achieve a near-ideal breakdown voltage for a given substrate resistivity and thickness, the breakdown voltage is determined by the intrinsic geometry of the unit cell in the vertical power MOSFETs (DMOSFET and UMOSFET). The authors analyse the on-resistance value each structure can offer while satisfying a specific blocking voltage requirement is given
Keywords :
insulated gate field effect transistors; power transistors; semiconductor device models; 2D model; DMOS power FET; DMOSFET; UMOS power FETs; UMOSFET; blocking voltage; experimental comparison; intrinsic geometry; near-ideal breakdown voltage; numerical analysis; on-resistance; substrate resistivity; termination technology; unit cell; vertical power MOSFETs; Capacitance; Conductivity; Doping; Geometry; Numerical analysis; Performance analysis; Poisson equations; Research and development; Semiconductor process modeling; Voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
