• DocumentCode
    1417855
  • Title

    The flexibility of configurable computing

  • Author

    Villasenor, John ; Hutchings, Brad

  • Author_Institution
    Dept. of Electr. Eng., Univ. of California, Los Angeles, CA, USA
  • Volume
    15
  • Issue
    5
  • fYear
    1998
  • fDate
    9/1/1998 12:00:00 AM
  • Firstpage
    67
  • Lastpage
    84
  • Abstract
    There has been growing recent interest in configurable computing, which can be viewed as a hybrid between ASICs and programmable processors. Configurable computing machines are implemented with programmable logic: flexible hardware that can be structured to fit the natural organization and data flow of a computation. The enabling device for configurable computing is the field-programmable array (FPGA). For applications characterized by deeply pipelined, highly parallel, and integer arithmetic processing, configurable computing machines can outperform alternative solutions by up to an order of magnitude. The combination in a single device of dedicated hardware and rapid, submillisecond-scale reprogrammability constitutes an exciting and promising development whose implications are only just beginning to be exploited. We begin with a brief tutorial on FPGAs that describes the most common FPGA architectures and how these architectures are used to support computation, memory access, and data flow. We then present FPGAs as computing machines and focus on devices that are reconfigured during run time. Ongoing research involving FPGAs and future directions are also discussed
  • Keywords
    field programmable gate arrays; reconfigurable architectures; reviews; ASICs; FPGA; FPGA architectures; computing machines; configurable computing; data flow; data-intensive real-time processing; dataflow; deeply pipelined processing; field-programmable array; flexible hardware; highly parallel processing; integer arithmetic processing; memory access; programmable logic; programmable processors; submillisecond-scale reprogrammability; Application specific integrated circuits; Computer architecture; Concurrent computing; Costs; Field programmable gate arrays; Hardware; Programmable logic arrays; Prototypes; Routing; Table lookup;
  • fLanguage
    English
  • Journal_Title
    Signal Processing Magazine, IEEE
  • Publisher
    ieee
  • ISSN
    1053-5888
  • Type

    jour

  • DOI
    10.1109/79.708541
  • Filename
    708541