DocumentCode :
1417906
Title :
Compile-time techniques for improving scalar access performance in parallel memories
Author :
Gupta, Rajiv ; Soffa, Mary Lou
Author_Institution :
Dept. of Comput. Sci., Pittsburgh Univ., PA, USA
Volume :
2
Issue :
2
fYear :
1991
fDate :
4/1/1991 12:00:00 AM
Firstpage :
138
Lastpage :
148
Abstract :
Compile-time techniques for storage allocation of scalar values into memory modules that limit run-time memory-access conflicts are presented. The allocation approach is applicable to those operands in instructions that can be predicted at compile-time, where an instruction is composed of the multiple operations and corresponding operands that execute in parallel. Algorithms to schedule data transfers among memory modules to avoid conflicts that cannot be eliminated by the distribution of values alone are developed. The techniques have been implemented as part of a compiler for a reconfigurable long instruction word architecture. Results of experiments are presented demonstrating that a very high percentage of memory access conflicts can be avoided by scheduling a very low number of data transfers
Keywords :
parallel processing; program compilers; storage allocation; compiler; data transfers; memory access conflicts; reconfigurable long instruction word architecture; scalar values; storage allocation; Bandwidth; Computer science; Degradation; Impedance; Laser mode locking; Memory architecture; Multiprocessor interconnection networks; Processor scheduling; Programming profession; Scheduling algorithm;
fLanguage :
English
Journal_Title :
Parallel and Distributed Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1045-9219
Type :
jour
DOI :
10.1109/71.89060
Filename :
89060
Link To Document :
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