• DocumentCode
    1418061
  • Title

    Optimum collector width of VLSI bipolar transistors for maximum f max at high current densities

  • Author

    Kumar, M. Jagadesh ; Datta, Krishanu

  • Author_Institution
    Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, India
  • Volume
    44
  • Issue
    5
  • fYear
    1997
  • fDate
    5/1/1997 12:00:00 AM
  • Firstpage
    903
  • Lastpage
    905
  • Abstract
    A simple analytical model for optimum collector epi-layer thickness Wepi to maximize fmax of VLSI bipolar transistors having reach-through collector is reported. Numerical and analytical results for Wepi are compared to verify the validity of our model for the optimum collector epi-layer thickness at high current densities
  • Keywords
    VLSI; bipolar integrated circuits; bipolar transistors; electric breakdown; semiconductor device models; VLSI; analytical model; bipolar transistors; collector width; current densities; epi-layer thickness; reach-through collector; Analytical models; Bipolar transistors; Current density; Delay; Frequency; Heterojunction bipolar transistors; Kirk field collapse effect; Radiative recombination; Semiconductor devices; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.568057
  • Filename
    568057
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1418061