DocumentCode
141845
Title
Technology-design-manufacturing co-optimization for advanced mobile SoCs
Author
Yeap, Geoffrey
Author_Institution
Qualcomm Technologies Inc., 5775 Morehouse Drive, San Diego, CA 92121
fYear
2014
fDate
15-17 Sept. 2014
Firstpage
1
Lastpage
8
Abstract
How to maintain the Moore´s Law scaling beyond the 193 immersion resolution limit is the key question semiconductor industry needs to answer in the near future. Process complexity will undoubtfully increase for 14nm node and beyond, which brings both challenges and opportunities for technology development. A vertically integrated technology-design-manufacturing co-optimization flow is desired to better address the complicated issues new process changes bring. In recent years smart mobile wireless devices have been the fastest growing consumer electronics market. Advanced mobile devices such as smartphones are complex systems with the overriding objective of providing the best user-experience value by harnessing all the technology innovations. Most critical system drivers are better system performance/power efficiency, cost effectiveness, and smaller form factors, which, in turns, drive the need of system design and solution with More-than-Moore innovations. Mobile system-on-chips (SoCs) has become the leading driver for semiconductor technology definition and manufacturing. Here we highlight how the co-optimization strategy influenced architecture, device/circuit, process technology and package, in the face of growing process cost/complexity and variability as well as design rule restrictions.
Keywords
Logic gates; Metals; Mobile communication; Optimization; Performance evaluation; Standards; System-on-chip; Mobile SoCs; design rule; design-technology co-optimization; double patterning; local interconnect;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the
Conference_Location
San Jose, CA, USA
Type
conf
DOI
10.1109/CICC.2014.6946000
Filename
6946000
Link To Document