DocumentCode
141862
Title
A 5.8nW, 45ppm/°C on-chip CMOS wake-up timer using a constant charge subtraction scheme
Author
Seokhyeon Jeong ; Inhee Lee ; Blaauw, D. ; Sylvester, Dennis
Author_Institution
Univ. of Michigan, Ann Arbor, MI, USA
fYear
2014
fDate
15-17 Sept. 2014
Firstpage
1
Lastpage
4
Abstract
This work presents an ultra-low power oscillator designed for wake-up timers in compact wireless sensors. A constant charge subtraction scheme removes continuous comparator delay from the oscillation period, which is the source of temperature dependence in conventional RC relaxation oscillators. This relaxes comparator design constraints, enabling low power operation. In 0.18μm CMOS, the oscillator consumes 5.8nW at room temperature with temperature stability of 45ppm/°C (-10°C to 90°C) and 1%V line sensitivity.
Keywords
CMOS integrated circuits; RC circuits; integrated circuit design; low-power electronics; oscillators; sensors; RC relaxation oscillators; compact wireless sensors; comparator delay; comparator design; constant charge subtraction scheme; line sensitivity; on-chip CMOS wake-up timer; oscillation period; power 5.8 nW; size 0.18 mum; temperature -10 degC to 90 degC; temperature dependence; temperature stability; ultra-low power oscillator; Clocks; Delays; Oscillators; Resistors; Temperature measurement; Temperature sensors; Thermal stability;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the
Conference_Location
San Jose, CA
Type
conf
DOI
10.1109/CICC.2014.6946008
Filename
6946008
Link To Document