HTOL SRAM Vmin shift considerations in scaled HKMG technologies

Author

Balasubramanian, S. ; Joshi, Vinayak ; Klick, T. ; Mann, R. ; Versaggi, J. ; Gautam, Anjali ; Weintraub, C. ; Kurz, Gerhard ; Krause, G. ; Kerber, Andreas ; Parameshwaran, B. ; Nigam, Tanya

Author_Institution

Globalfoundries, Santa Clara, CA, USA

fYear

2014

fDate

15-17 Sept. 2014

Firstpage

1

Lastpage

4

Abstract

This paper examines the role of NBTI and PBTI on SRAM Vmin shifts during HTOL stressing and quantifies their impact on reliability lifetime projections in scaled high-k metal gate (HKMG) technologies. Correlation between measured HTOL SRAM Vmin shifts and transistor level parametrics is summarized on both 28nm poly-SiON and HKMG technologies. The paper concludes that the commonly used HTOL acceleration voltage of 1.4xVnom may be excessive in scaled HKMG technologies due to the larger role of PBTI in SRAMs.

Keywords

SRAM chips; integrated circuit testing; internal stresses; negative bias temperature instability; polymers; reliability; silicon compounds; transistor circuits; voltage measurement; HKMG technologies; HTOL SRAM; HTOL acceleration voltage; HTOL stressing; NBTI; PBTI; SiON; high temperature operating life; high-k metal gate technologies; reliability lifetime projections; size 28 nm; transistor level parametrics; Correlation; Degradation; Logic gates; Random access memory; Reliability; Stress; Transistors; CMOS; HKMG; HTOL; NBTI; PBTI; SRAM; Vmin; replacement metal gate; scaling;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the

Conference_Location

San Jose, CA

Type

conf

DOI

10.1109/CICC.2014.6946031

Filename

6946031