• DocumentCode
    141961
  • Title

    Microelectronics wirebond pull and shear test simulations using finite element method

  • Author

    Hunter, Steven ; Hill, Levi W.

  • Author_Institution
    ON Semicond., Pocatello, ID, USA
  • fYear
    2014
  • fDate
    18-18 April 2014
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Microelectronics wirebonding is used in the vast majority of semiconductor assembly and packaging operations worldwide. In the last few years, much of the manufacturing that traditionally had been gold (Au) wirebond has switched to using copper (Cu) wire. Once a wirebond “recipe” is established in manufacturing, reliability is checked by Bond Pull Strength test (Mil-Std 883G method 2011) and Bond Shear test (JEDEC JESD22 B116A). Both industry standards were established based on gold (Au) wirebonds. Cu wire is stronger and stiffer, producing higher values than Au in both pull and shear tests when well-bonded, so companies are comfortably complying with the old Au reliability limits while using Cu wire. But in fact, Cu intermetallic (IMC) growth and bonding is quite different than for Au, and failure modes in the shear test can be different for Cu than for Au. A new committee is active to revise the JESD22 B116A method to cover Cu wirebond as well as Au. BYU-Idaho students have responded to recent interest in switching from Au to copper Cu wire, modeling both the bond pull strength and bond shear tests using finite element methods. Simulations include the various ball bond wire types (Au, Cu, and silver (Ag) alloys), ball sizes, pad aluminum (Al) thicknesses, and IC bond pad structures in silicon wafers. Results show how stresses imparted to the bond pad in these reliability tests change when switching wire types, etc., helping to explain the physical results as well as to indicate potential issues in the interpretation of failure modes.
  • Keywords
    copper alloys; finite element analysis; gold alloys; integrated circuit bonding; integrated circuit reliability; lead bonding; shear strength; silicon; silver alloys; Ag; Au; Cu; IC bond pad structures; JEDEC JESD22 B116A method; Mil-Std 883G method 2011; ball bond wire; bond pull strength test; bond shear test; copper intermetallic growth; copper wire; finite element method; gold wirebond; microelectronics wirebonding; pad aluminum thicknesses; pull test simulations; reliability tests; semiconductor assembly operations; semiconductor packaging operations; shear test simulations; silicon wafers; Abstracts; Computational modeling; Educational institutions; Gold; Integrated circuit modeling; Nanoscale devices; Reliability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics And Electron Devices (WMED), 2014 IEEE Workshop On
  • Conference_Location
    Boise, ID
  • ISSN
    1947-3834
  • Print_ISBN
    978-1-4799-2222-2
  • Type

    conf

  • DOI
    10.1109/WMED.2014.6818715
  • Filename
    6818715