Title :
Advanced modeling and simulation of state-of-the-art high-speed I/O interfaces
Author_Institution :
Mixed-Signal IC & Syst. Group, Seoul Nat. Univ., Seoul, South Korea
Abstract :
Today´s high-speed I/O interfaces demand extensive modeling and simulation to: design optimal equalization to compensate channel loss, compare different clocking schemes, verify functionalities of digital calibration/adaptation loops. For effective system-level performance analysis, it is important to understand the key modeling requirements for each of the link components, and to use an efficient simulator that can achieve both high accuracy and fast speed.
Keywords :
equalisers; network synthesis; transceivers; channel loss compensation; clocking schemes; digital calibration-adaptation loops; high-speed I/O interfaces; link components; link transceiver modeling; optimal equalization design; system-level performance analysis; Calibration; Crosstalk; Dielectric losses; Integrated circuit modeling; Noise; Timing;
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the
Conference_Location :
San Jose, CA
DOI :
10.1109/CICC.2014.6946077
