Effects of two-step high temperature deuterium anneals on SONOS nonvolatile memory devices

Author

Bu, Jiankang ; White, Marvin H.

Author_Institution

Microelectron. Res. Lab., Lehigh Univ., Bethlehem, PA, USA

Volume

22

Issue

1

fYear

2001

Firstpage

17

Lastpage

19

Abstract

The deterioration of the Si-SiO/sub 2/ interface is associated with the degradation of long-term retention in polysilicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile semiconductor memory (NVSM) devices. Two-step high temperature deuterium anneals, applied in SONGS device fabrication for the first time, improves the endurance characteristics and retention reliability over traditional hydrogen anneals. Electrical characterization shows deuterium-annealed SONOS devices have nearly one order of magnitude longer retention time than hydrogen-annealed devices after 10/sup 7/ erase/write cycles at 85/spl deg/C to provide an extrapolated 0.5 V detection window at ten years.

Keywords

EPROM; MOSFET; annealing; elemental semiconductors; interface states; semiconductor device reliability; semiconductor storage; semiconductor-insulator boundaries; silicon; silicon compounds; 0.5 V; 85 C; SONOS nonvolatile memory devices; Si-SiO/sub 2/ interface; Si-SiO/sub 2/-SiN; endurance characteristics; nonvolatile semiconductor memory device; retention reliability; two-step high temperature D anneals; Annealing; Degradation; Deuterium; Fabrication; Hydrogen; Nonvolatile memory; SONOS devices; Semiconductor memory; Silicon; Temperature;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.892430

Filename

892430