Device analysis for a-Si:H thin-film transistors with organic passivation layer

Two dimensional device analysis has been performed to explain the experimental drain current-gate voltage (I/sub D/-V/sub GS/) characteristics of hydrogenated amorphous silicon thin-film transistors with various passivation layers. The shift of the I/sub D/-V/sub GS/ curve in the negative direction and the increase of S-factor (the inverse of subthreshold slope in logarithmic I/sub D/-V/sub GS/ curve) can be explained well by introducing positive fixed charges and defect states in the back interface region. It was found that the positive fixed charge and the defect density of a-Si:H TFT with an organic passivation layer are higher than those of conventional a-Si:H TFT with a silicon-nitride (SiN/sub x/) passivation layer. The simulation shows that the front and back interfaces interact and this explains why the passivation affects the device performance such as V/sub th/ and S-factor in a-Si:H TFTs.