Title :
Slight gate oxide thickness increase in PMOS devices with BF2 implanted polysilicon gate
Author :
Tsai, Jiunn-Yann ; Shi, Ying ; Prasad, Sharad ; Yeh, Stanley W C ; Rakkhit, Rajat
Author_Institution :
LSI Logic Inc., Santa Clara, CA, USA
Abstract :
The gate oxide thickness increase in PMOSFET devices with BF/sub 2/ implanted p/sup +/ polysilicon gate is observed even when rapid thermal annealing (RTA) is used as a dopant activation thermal process. The increase of oxide thickness is studied as a function of RTA temperature, RTA time, and initial oxide thickness in the 35 /spl Aring/ regime and is being reported for the first time. It was found that oxide thickness increase could be as significant as 7% in this regime. This phenomenon can be explained by the model of fluorine incorporation, which is found to he effectively suppressed with nitrogen implanted in the polysilicon.
Keywords :
MOSFET; boron compounds; dielectric thin films; elemental semiconductors; ion implantation; rapid thermal annealing; semiconductor doping; silicon; 35 A; BF/sub 2/ implanted polysilicon gate; N implantation suppression; PMOS devices; PMOSFET devices; RTA temperature; RTA time; Si:BF/sub 2/; dopant activation thermal process; fluorine incorporation model; gate oxide thickness; initial oxide thickness; nitrogen implantation; oxide thickness increase; p/sup +/ polysilicon gate; rapid thermal annealing; Boron; Extrapolation; MOS capacitors; MOS devices; MOSFET circuits; Nitrogen; Rapid thermal annealing; Rapid thermal processing; Temperature; Tunneling;
Journal_Title :
Electron Device Letters, IEEE
