Title :
Implementation of a H.264/AVC SVC decoder with multi-symbol prediction CAVLC for advanced T-DMB receiver
Author :
Kim, Dong-Sun ; Lee, Seung-Yerl ; Lee, Sang-Seol ; Ahn, Jae-Hun ; Cho, Byeong-Ho
Author_Institution :
Multimedia IP Res. Center, Korea Electron. Technol. Inst., Seongnam, South Korea
fDate :
11/1/2010 12:00:00 AM
Abstract :
This paper presents a low-cost high-performance H.264/AVC SVC decoder with multi-symbol prediction context-based adaptive variable length coding (CAVLC) for advanced T-DMB receiver. Proposed multi-symbol prediction CAVLC mainly consists of a simple arithmetic operation unit with reduced look-up tables and a leading zero detector. We also propose a multi-symbol run_before decoder and it decodes more than 2.5 symbols in a cycle. Gate count of a H.264/AVC SVC decoder is about 1,300K gates when synthesized with 0.18 um CMOS process and it can be operated at 120 MHz clock frequency. For the verification of a H.264/AVC SVC decoder chip, prototype mobile movie player systems have been implemented using a 7 inch LCD and USB controller.
Keywords :
adaptive codes; digital multimedia broadcasting; table lookup; video coding; CMOS process; H.264-AVC SVC decoder; LCD; T-DMB receiver; USB controller; advanced T-DMB receiver; context-based adaptive variable length coding; frequency 120 MHz; lookup tables; mobile movie player system; multisymbol prediction CAVLC; Automatic voltage control; Decoding; Encoding; Static VAr compensators; Streaming media; Table lookup; Throughput; Scalable video coding, CAVLC decoder, multi-symbol decoder, VLSI, H.264/AVC.;
Journal_Title :
Consumer Electronics, IEEE Transactions on
DOI :
10.1109/TCE.2010.5681174