Effect of chip failures on cache memory systems using copy-back

In this paper, a model is developed to calculate the degradation in the expected Read time of cache memory systems due to memory-chip failures. The main memory update algorithm is copy-back. The model is applied to a typical system, and it is shown that changes in the Recovery time or the work-load have the greatest effect on the degradation if the probability of a word being overwritten in cache is high. Otherwise, the work-load has the greatest effect on the degradation. Furthermore, it is found that both cache and main-memory supporting circuitry have to be very reliable in a system with copy-back in order to reduce the degradation in the expected Read time; in a system with write-through, only the main-memory supporting circuitry has to be very reliable.