The Case for Embedded Networks on Chip on Field-Programmable Gate Arrays

FPGAs are becoming more powerful computing devices as a result of increased logic capacity, inclusion of embedded processors and I/O controllers, and the rise of high-level programming-language-to-hardware compilers. However, accelerating computing applications on FPGAs is still challenging, partly due to the need for low-level hardware design of a system-level interconnect to integrate the application components. The authors propose augmenting the FPGA architecture with an embedded NoC to implement the system-level communication infrastructure and mitigate the hardware design challenges faced by current bus-based interconnects. With a flexible interface between the NoC and the FPGA fabric, an embedded NoC maintains the configurability of the FPGA, and simplifies distribution of I/O data throughout the chip. Embedded NoCs are always more energy-efficient compared with custom buses configured into the fabric by commercial system integration tools, and they save area for most systems as well.