DocumentCode
1423089
Title
Design of 1.94-GHz CMOS Noise-Cancellation VCO
Author
Heng, Chun-Huat ; Bansal, Amit ; Zheng, Yuanjin
Author_Institution
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore, Singapore
Volume
59
Issue
2
fYear
2011
Firstpage
368
Lastpage
374
Abstract
Through the understanding of various phase-noise mechanisms and sources in an LC voltage-controlled oscillator (VCO), a noise-cancellation technique has been proposed earlier. The 2-GHz CMOS noise-cancellation VCO, fabricated in 0.35-μm CMOS, has achieved an overall phase-noise reduction of 10 dB and phase noise of -121.6 dBc/Hz @ 500-kHz offset. The VCO core consumes 2.8 mA under 2.4-V supply and occupies an area of 0.7 mm × 0.8 mm. It achieves a figure-of-merit of -186 dBc/Hz. In this paper, we will examine the design methodology of this proposed noise-cancellation VCO in detail.
Keywords
CMOS analogue integrated circuits; UHF integrated circuits; UHF oscillators; phase noise; voltage-controlled oscillators; CMOS noise-cancellation VCO; LC voltage-controlled oscillator; current 2.8 mA; frequency 1.94 GHz; frequency 2 GHz; phase noise-cancellation technique; size 0.35 mum; voltage 2.4 V; voltage-controlled oscillator; Noise cancellation; RF CMOS; phase noise; voltage-controlled oscillator (VCO);
fLanguage
English
Journal_Title
Microwave Theory and Techniques, IEEE Transactions on
Publisher
ieee
ISSN
0018-9480
Type
jour
DOI
10.1109/TMTT.2010.2097715
Filename
5685280
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