InP DHBT technology and design methodology for high-bit-rate optical communications circuits

Author

Andre, Philippe ; Benchimol, Jean-Louis ; Desrousseaux, Patrick ; Duchenois, Anne-Marie ; Godin, Jean ; Konczykowska, Agnieszka ; Meghelli, Mounir ; Riet, Muriel ; Scavennec, Andre

Author_Institution

France Telecom, Bagneux, France

Volume

33

Issue

9

fYear

1998

fDate

9/1/1998 12:00:00 AM

Firstpage

1328

Lastpage

1335

Abstract

High-bit-rate optical communication links require high performance circuits. Electrical time division multiplex (ETDM) single channel bit-rate of 40 Gb/s is at hand, due to recent progress in both technology and design methodology. Multilevel modulation format can be envisaged for ETDM transmission. An InP double heterojunction bipolar transistor technology is presented in this paper. The methodology used and tools developed with optical communications in mind are also discussed. Fabricated circuits are reported: 40 Gb/s multiplexer and demultiplexer, a 20 Gb/s driver, a 30 Gb/s selector-driver, a 22 Gb/s decision circuit, and a decision-decoding circuit for multilevel transmissions

Keywords

III-V semiconductors; bipolar digital integrated circuits; decoding; demultiplexing equipment; driver circuits; heterojunction bipolar transistors; indium compounds; integrated circuit design; multiplexing equipment; optical communication equipment; optical fibre communication; optical links; time division multiplexing; 20 to 40 Gbit/s; DHBT technology; ETDM; III-V semiconductors; InP; decision circuit; decision-decoding circuit; demultiplexer; design methodology; driver; electrical time division multiplex; high-bit-rate optical communications circuits; multilevel modulation format; multiplexer; optical communication links; selector-driver; Circuits; DH-HEMTs; Design methodology; Heterojunction bipolar transistors; Indium phosphide; Optical fiber communication; Optical receivers; Optical transmitters; Synchronous digital hierarchy; Wavelength division multiplexing;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.711331

Filename

711331