Title :
An 0.8-μm high-voltage IC using a newly designed 600-V lateral p-channel dual-action device on SOI
Author :
Watabe, Kiyoto ; Akiyama, Hajime ; Terashima, Tomohide ; Okada, Masakazu ; Nobuto, Shinji ; Yamawaki, Masao ; Asai, Sotoju
Author_Institution :
ULSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
fDate :
9/1/1998 12:00:00 AM
Abstract :
A novel lateral power device, termed a p-channel dual-action device (p-ch DAD), is proposed and experimentally demonstrated in action. This device is based on a new dual-action mechanism. The new device has successfully increased on-state current without lowering the device breakdown voltage. The 600-V level-shifting action of the p-ch DAD has been confirmed by a circuit experiment. A newly designed p-ch DAD on the silicon on insulator can be made by adding four additional masks and trench technology to a 0.8-μm CMOS process. Moreover, the process we have developed is completely compatible with an existing 5-V 0.8-μm CMOS process
Keywords :
CMOS integrated circuits; power integrated circuits; silicon-on-insulator; 0.8 micron; 600 V; CMOS process; SOI; breakdown voltage; high-voltage IC; lateral power device; mask; on-state current; p-channel dual-action device; trench isolation; CMOS process; CMOS technology; Cathodes; Insulated gate bipolar transistors; Integrated circuit technology; Isolation technology; Resistors; Silicon on insulator technology; Substrates; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
