Title :
Fast erase algorithm using flash translation layer in NAND-type flash memory
Author_Institution :
Dept. of Comput. Sci. & Eng., SungKyunKwan Univ., Suwon, South Korea
fDate :
11/1/2011 12:00:00 AM
Abstract :
Flash memory can be classified into NOR type and NAND type. The NOR type memories enables fast reading with byte level I/O is developed into memory for code storage such as ROM BIOS. The NAND type memories cheaper than NOR type and therefore more widely used to larger scale systems. This paper proposed the new file translation system by making a new file structure which can decrease write operations. This file structure reduced write operation frequency of flash memory in file system layer. We can reduced write operation rate because of a write operation rate can be improved the efficiency of file translation operations. Flash Translation Layer (FTL) is to mapping a logical data address to a physical data address in flash memory, its designed to realize erase policy of data in order to perform write operation. The FTL suggests fast erase algorithm reduced write operation through a new file system structure and FTL programming. In addition, we have made the oldest data clean algorithm and then, the most recent data maintained longest as a result of experiment that the recent applied program. In this result, Data tend to be implemented again through the concept of regional and time space which appears automatically when applied program is implemented. This work proves the efficiency of the file system of NAND type flash memories through experiments. Through experiment and realization of the Flash file system, this scheme proved the efficiency of NAND-type flash file system which is required in an embedded system.
Keywords :
file organisation; flash memories; input-output programs; logic gates; read-only storage; FTL programming; NAND-type flash memory; NOR type memories; ROM BIOS; byte level I/O; code storage; data clean algorithm; embedded system; fast erase algorithm; file structure; file system layer; file translation system; flash translation layer; logical data address mapping; physical data address mapping; reduced write operation frequency; reduced write operation rate; Algorithm design and analysis; Embedded systems; File systems; Flash memory; Memory management; SDRAM; File System Structure.; File TranslationLayer; File system; NAND Flash;
Journal_Title :
Consumer Electronics, IEEE Transactions on
DOI :
10.1109/TCE.2011.6131150