Title :
ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips
Author :
Cheng, Yi-Kan ; Raha, Prasun ; Teng, Chin-Chi ; Rosenbaum, Elyse ; Kang, Sung-Mo
Author_Institution :
Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
fDate :
8/1/1998 12:00:00 AM
Abstract :
In this paper, we present a new chip-level electrothermal timing simulator for CMOS VLSI circuits. Given the chip layout, the packaging specification, and the periodic input signal pattern, it finds the on-chip steady-state temperature profile and the resulting circuit performance. A tester chip has been designed for verification of ILLIADS-T, and very good agreement between simulation and experiment was found. Using this electrothermal simulator, temperature-dependent reliability and timing problems of VLSI circuits can be accurately identified
Keywords :
CMOS integrated circuits; VLSI; circuit analysis computing; digital simulation; integrated circuit reliability; temperature distribution; timing; CMOS VLSI chips; ILLIADS-T; chip layout; circuit performance; electrothermal timing simulator; on-chip steady-state temperature profile; packaging specification; periodic input signal pattern; temperature-sensitive reliability diagnosis; Circuit optimization; Circuit simulation; Computational modeling; Electronic packaging thermal management; Electrothermal effects; Integrated circuit reliability; Power dissipation; Temperature dependence; Timing; Very large scale integration;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
