DocumentCode
1424159
Title
Gate Enhanced Power UMOSFET With Ultralow On-Resistance
Author
Wang, Ying ; Hu, Hai-Fan ; Jiao, Wen-li ; Cheng, Chao
Author_Institution
Coll. of Inf. & Commun. Eng., Harbin Eng. Univ., Harbin, China
Volume
31
Issue
4
fYear
2010
fDate
4/1/2010 12:00:00 AM
Firstpage
338
Lastpage
340
Abstract
Gate enhanced power UMOSFET (GE-UMOS) is proposed to decrease the specific on -resistance of the device. The key feature of this structure is that the deep trench polysilicon electrode is contacted to the gate electrode, maintaining the breakdown voltage and forming the high electron current density at side n-drift region, thus resulting in a lower on -resistance compared to the superjunction structure and gradient oxide-bypassed (GOB) structure. Furthermore, the performance of GE-UMOS is proved by comparing with the GOB-UMOS structure.
Keywords
electric resistance; electrochemical electrodes; power MOSFET; semiconductor device breakdown; break-down voltage; deep trench polysilicon electrode; gate electrode; gate enhanced power UMOSFET; high electron current density; n-drift region; specific on-resistance; ultralow on-resistance; Breakdown voltage (BV); gate enhanced (GE); power UMOSFET; specific on -resistance $(R_{rm ON})$ ;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2010.2040576
Filename
5419108
Link To Document