• DocumentCode
    1424277
  • Title

    Statistical Analysis of ENOB and Yield in Binary Weighted ADCs and DACS With Random Element Mismatch

  • Author

    Fredenburg, Jeffrey A. ; Flynn, Michael P.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA
  • Volume
    59
  • Issue
    7
  • fYear
    2012
  • fDate
    7/1/2012 12:00:00 AM
  • Firstpage
    1396
  • Lastpage
    1408
  • Abstract
    Mismatch motivates many of the design decisions for binary weighted, ratiometric converters, such as successive approximation (SAR) analog-to-digital converters (ADC), but the statistical relationship between mismatch and signal-to-noise-plus-distortion ratio (SNDR) has not been precisely quantified. In this paper, we analyze the effects of capacitor mismatch in a binary weighted, charge redistribution SAR ADC and derive a new analytic expression relating capacitor mismatch and the effective-number-of-bits (ENOB). We then explore the statistics of this new expression and develop a model that accurately predicts yield in terms of ENOB. Finally, the major results of this paper are generalized into a simple and compact design equation that relates resolution, mismatch, and ENOB to yield for all binary weighted, ratiometric converters. The expressions derived in this paper offer practical insight into the relationship between mismatch and performance for all binary, weighted ratiometric converters with these results validated through numerical simulations.
  • Keywords
    analogue-digital conversion; capacitors; digital-analogue conversion; numerical analysis; statistical analysis; DAC; binary weighted charge redistribution SAR ADC; binary weighted ratiometric converters; capacitor mismatch effect; effective-number-of-bits; numerical simulations; random element mismatch; signal-to-noise-plus-distortion ratio; statistical analysis; successive approximation analog-to-digital converters; Approximation methods; Arrays; Capacitance; Capacitors; Equations; Mathematical model; Noise; Analog-digital conversion; analog integrated circuits; mismatch; successive approximation registers; yield;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2011.2177006
  • Filename
    6132449