• DocumentCode
    1424695
  • Title

    Errata to “Accelerating FPGA Routing Through Parallelization and Engineering Enhancements Special Section on PAR-CAD 2010” [Jan 12 61-74]

  • Volume
    31
  • Issue
    2
  • fYear
    2012
  • Firstpage
    327
  • Lastpage
    327
  • Abstract
    Due to a production error, in the above titled paper (ibid., vol. 31, no. 1, pp. 61-74, Jan. 2012), the title appeared incorrectly. The correct title should read "Accelerating FPGA Routing Through Parallelization and Engineering Enhancements."
  • Keywords
    Field programmable gate arrays; Routing;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2012.2183029
  • Filename
    6132645