Modeling the Independent Double Gate Transistor in Accumulation Regime for 1TDRAM Application

Author

PUGET, Sophie ; BOSSU, Germain ; Masson, Pascal ; Mazoyer, Pascale ; Ranica, Rossella ; Villaret, Alexandre ; Lorenzini, Philippe ; Portal, Jean-Michel ; Rideau, Denis ; Ghibaudo, Gérard ; BOUCHAKOUR, Rachid ; Jacquemod, Gilles ; Skotnicki, Thomas

Author_Institution

STMicroelectronics, Crolles, France

Volume

57

Issue

4

fYear

2010

fDate

4/1/2010 12:00:00 AM

Firstpage

855

Lastpage

865

Abstract

This paper details the modeling of a one-transistor dynamic random-access memory (1TDRAM) based on an independent double-gate device. A pseudo-2-D compact model of memory operations and dynamic behavior of data retention is proposed. The physical mechanisms involved are calculated through the accumulated charge in the body modulated by quantum effects related to thin silicon films. The resulting currents from programming operations are detailed. We consider current leakages, generation/recombination, and band-to-band tunneling parasitic effects for data retention.

Keywords

random-access storage; band-to-band tunneling parasitic effects; data retention; independent double gate device; independent double gate transistor; memory operations; one transistor dynamic random access memory; pseudo 2D compact model; quantum effects; thin silicon films; Charge carrier processes; Dielectric constant; Electrons; Energy states; Laboratories; Portals; Random access memory; Semiconductor films; Silicon; Voltage; Accumulation regime; capacitorless dynamic random-access memory (DRAM); floating-body cell; independent double-gate (IDG) transistor; kink effect; one-transistor DRAM (1TDRAM); volatile memory modeling;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2010.2040937

Filename

5420010