Title :
Bilayer Pseudospin Field-Effect Transistor: Applications to Boolean Logic
Author :
Reddy, Dharmendar ; Register, Leonard Franklin ; Tutuc, Emanuel ; Banerjee, Sanjay K.
Author_Institution :
Microelectron. Res. Center, Univ. of Texas at Austin, Austin, TX, USA
fDate :
4/1/2010 12:00:00 AM
Abstract :
We have recently proposed a new type of bilayer graphene-based transistor for ultralow-power (perhaps 1000 times less compared with CMOS) room-temperature operation, namely, the bilayer pseudospin field-effect transistor (BiSFET). BiSFET operation is based on gated exciton-condensate-enhanced tunneling. Here, we discuss implementation, operation, and predicted power consumption of BiSFET-based Boolean logic gates, including an inverter, an inverter-based nor gate, and a programmable nand/or, as well as a BiSFET-based memory element. The advantages over CMOS in terms of lower voltage and power are discussed.
Keywords :
CMOS logic circuits; field effect transistors; graphene; logic gates; tunnelling; BiSFET operation; BiSFET-based memory element; Boolean logic gates; CMOS; bilayer pseudospin field-effect transistor; gated exciton-condensate-enhanced tunneling; graphene-based transistor; inverter-based nor gate; programmable nand; programmable or; ultralow-power room-temperature operation; Boolean functions; CMOS logic circuits; FETs; Logic devices; Logic gates; MOSFETs; Nanoelectronics; Physics; Tunneling; Voltage; Beyond complementary metal–oxidesemiconductor (CMOS) graphene; bilayer; graphene; nanoelectronics; pseudospin; tunneling;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2010.2041280