• DocumentCode
    1426634
  • Title

    Zero Static Power Dissipation Biasing of RSFQ Circuits

  • Author

    Kirichenko, D.E. ; Sarwana, S. ; Kirichenko, A.F.

  • Author_Institution
    HYPRES, Inc., Elmsford, NY, USA
  • Volume
    21
  • Issue
    3
  • fYear
    2011
  • fDate
    6/1/2011 12:00:00 AM
  • Firstpage
    776
  • Lastpage
    779
  • Abstract
    We present a novel, resistor-free approach to dc biasing of RSFQ circuits, known as Energy-efficient RSFQ (ERSFQ). This biasing scheme does not dissipate energy in the static (non-active) mode, and dissipates orders of magnitude less power than traditional RSFQ while operating. Using this approach, we have designed, fabricated and successfully tested at low and high speed a D flip-flop with complementary outputs and several static frequency dividers. We present the method, demonstrate experimental results, and discuss future implementations of ERSFQ.
  • Keywords
    flip-flops; frequency dividers; superconducting logic circuits; D flip-flop; dc biasing; energy-efficient RSFQ circuit; resistor-free approach; static frequency divider; zero static power dissipation biasing; Clocks; Detectors; Frequency conversion; Inductors; Junctions; Power dissipation; Resistors; Cryogenic; RSFQ; SFQ; detector readout; low power; power efficient; switching energy;
  • fLanguage
    English
  • Journal_Title
    Applied Superconductivity, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1051-8223
  • Type

    jour

  • DOI
    10.1109/TASC.2010.2098432
  • Filename
    5688194