DocumentCode :
1427227
Title :
Estimating starting point of conduction of CMOS gates
Author :
Chatzigeorgiou, A. ; Nikolaidis, S. ; Tsoukalas, I.
Author_Institution :
Dept. of Comput. Sci., Aristotelian Univ. of Thessaloniki, Greece
Volume :
34
Issue :
17
fYear :
1998
fDate :
8/20/1998 12:00:00 AM
Firstpage :
1622
Lastpage :
1624
Abstract :
To model effectively the output waveform and propagation delay of a CMOS gate, knowledge of the time point at which it starts to conduct is essential. An efficient method for calculating analytically this time point taking into account the structure of the gate and the input waveform, is introduced. Such a method can easily be integrated into a timing analysis system
Keywords :
CMOS logic circuits; integrated circuit modelling; logic gates; timing; CMOS gate; conduction; model; output waveform; propagation delay; starting point; timing analysis;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19981166
Filename :
715249
Link To Document :
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