DocumentCode
1427641
Title
Using Ionizers to Reduce Electrostatically Adhered Particles on Wafer Backside
Author
Pandit, Viraj Sadanand, Sr. ; Kuo, Emery Y.
Author_Institution
Novellus Syst., Inc., San Jose, CA, USA
Volume
24
Issue
2
fYear
2011
fDate
5/1/2011 12:00:00 AM
Firstpage
158
Lastpage
164
Abstract
We present results and discussion on the positive impact of ionizer(s) used in multiple configurations on wafer backside and front-side particle adders in physical vapor deposition (PVD) processing tools. We provide a hypothesis, followed by testing, that establishes a relationship between electrical surface charge collection data and particle data obtained in a laboratory setting as well as a real-world wafer fabrication facility environment. For chip manufacturers, controlling surface charges on production wafers results in a reduced number of undesirable particles, thereby resulting in higher yield, more reliable final product chips, and reduced product losses. And for equipment manufacturers, more reliable and better tool performance can lead to increased productivity. The INOVA PVD system´s good particle performance, as demonstrated on good quality wafers, is made marginal quality wafersmore robust with an ionizer installation when marginal quality wafers are used.
Keywords
adders; electrostatics; logic testing; surface charging; vapour deposition; INOVA PVD system; electrical surface charge collection data; electrostatical adhered particle reduction; front-side particle adders; ionizer installation; marginal quality wafers; physical vapor deposition processing tools; surface charge control; wafer backside adders; wafer fabrication facility; Adders; Clamps; Electrostatics; Gravity; Surface discharges; Surface treatment; Electrostatic charge; ionizer; wafer backside particle contamination;
fLanguage
English
Journal_Title
Semiconductor Manufacturing, IEEE Transactions on
Publisher
ieee
ISSN
0894-6507
Type
jour
DOI
10.1109/TSM.2011.2106227
Filename
5688334
Link To Document