DocumentCode :
1428106
Title :
Boosted charge transfer preamplifier for low power Gbit-scale DRAM
Author :
Kim, Jong-Shik ; Yoo, Hoi-Jun ; Seo, Kwang-Seok
Author_Institution :
Inter-Univ. Semicond. Res. Center, Seoul Nat. Univ., South Korea
Volume :
34
Issue :
18
fYear :
1998
fDate :
9/3/1998 12:00:00 AM
Firstpage :
1785
Lastpage :
1787
Abstract :
A new charge transfer preamplifier scheme is developed for low power and high density DRAMs. It employs a boosting method with a MOSFET capacitor for a high voltage precharge level and a pulse control signal for a charge transfer switch. The new scheme increases the sensing margin and enhances the sensing speed under 1.5 V operation with a small area overhead. It also leads to a wider design window for a charge transfer switch as the supply voltage scales down
Keywords :
DRAM chips; MOS memory circuits; VLSI; preamplifiers; 1.5 V; MOSFET capacitor; boosted charge transfer preamplifier; charge transfer switch; high density DRAMs; high voltage precharge level; low power Gbit-scale DRAM; pulse control signal; sensing margin improvement; sensing speed enhancement;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19981161
Filename :
715390
Link To Document :
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